Analog-to-digital converters (ADCs) convert an analog input signal to a digital output value. However, because of the finite nature of digital representation, quantization error, the difference between the actual analog value and quantized digital value due to rounding or truncation, is an imperfection inherent to the analog-to-digital conversion.
In some ADCs, sigma-delta modulation is used to reduce the effects of quantization error and improve signal-to-noise ratio (SNR). Sigma-delta modulation (alternatively referred to as delta-sigma modulation) adds quantization error to a forward signal path using feedback loops and integrator circuits. The quantization error is sampled at a frequency greater than the analog input signal frequency, allowing it to be filtered at the integrators without noticeably impacting the signal.
To accommodate wide bandwidths and achieve wide dynamic range, higher order sigma-delta modulation feedback loops greater than second-order (i.e., more than two integrators) are often needed. However, higher order feedback loops suffer from instability under some input conditions. For example, a large input signal may cause an overload condition in the integrators. During an overload, the integrators do not output a signal representative of the input signal and the ADC does not produce useful data. Furthermore, an overload condition in the integrators can cause instability even when the input signal is reduced or removed, known as a runaway condition. If a runaway condition occurs, the ADC is reset in order to resume useful operation and remove the effects of the overload. Often, this involves short circuiting capacitors that are part of the integrators and waiting for downstream data (i.e., data in digital filters following the ADC) to be flushed from the system, resulting in an undesirable loss of data.
To avoid the overload and runaway conditions that occur in higher order feedback topologies, alternative topologies utilizing fewer feedback loops are often used. Higher order feed-forward topologies use high-frequency paths to a high-frequency summer. In the presence of an overloading signal, feed-forward topologies utilize an active limiting circuit to effectively limit the integrators and create a reduced order feedback loop allowing the ADC to recover from the overload. However, feed-forward topologies do not produce useful output data during an excessive or continuous overloading signal. Additionally, using high-frequency paths and high-frequency integrators increases the power and the surface area requirements for the ADC.
Other topologies, such as the multi-stage noise shaping (MASH) architecture, utilize cascaded first-order and second order loops and feed quantization error through stages to approximate the effect of higher order sigma-delta modulation feedback topologies. These topologies use additional digital filters and require matching the frequency response of the digital filters with the analog integrators, which is difficult, imperfect, and thus undesirable. Furthermore, while MASH and other topologies can recover from an overload and avoid runaway conditions, they do not produce useful output data in the presence of an excessive or continuous overloading signal.